Hi, I'm Aleks. I am an electrical engineer specializing in advanced-node analog layout. My work bridges the gap between physical custom silicon design and high-frequency modeling. A recent graduate of the University of Toronto, I am taking my 16 months of professional experience routing high-speed SerDes blocks at Cadence Design Systems into the industry full-time. I am deeply passionate about analog integrated circuit design, with a specific focus on transceivers, PLLs, and VCOs.

Email: aleks.rakulj@mail.utoronto.ca

Phone: 905-580-2612

LinkedIn: https://www.linkedin.com/in/aleksrakulj/